Mariano Ercoli, Michael Kraemer, Daniela Dragomirescu, Robert Plana

A study of the feasibility of a wide band double balanced resistive mixer in the 60 GHz band is done. The device is implemented in a 65nm CMOS technology process. In this paper an approach to design an optimized version of the mixer in terms of the principal figures of merit: conversion loss, port to port isolation and noise figure is shown. The mixer will be a part of an homodyne downconversion system. The conversion loss is 6.9

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