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3rd EOS/ESD/EMI WORKSHOP


Immunity of electronic applications to electrical (EOS/ESD) and electromagnetic (EMI) stresses:    

From system level to chip level

May 18-19, 2006 in TOULOUSE at Institut Aéronautique et Spatial (IAS)



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        Laboratoire d'Analyse et d'Architecture
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Electronics is now present in all human activity fields and the related mission profiles have become extremely tough, particularly, regarding environmental constraints. Concurrently, the technology miniaturization down to the nanoscale and the increasing complexity of integrated circuits (ICs) with the concepts of System-On-Chip (SOC) and System-In-Package (SIP) makes them more susceptible to various stresses and more difficult to meet robustness requirements. This trend will even worsen with the introduction of heterogeneous systems including both silicon micro-machined (MEMS) devices, signal processing and communication interfaces. Already, we interact daily and unconsciously with different MEMS devices: pressure sensors, accelerometers, ink-jets, and  micro-mirrors for display projectors are the most  ubiquitous ones; the automotive, industrial and medical applications being the biggest markets. The generalization of embedded systems and the critical safety issues in electronic applications such as the medical, space, aerospace, automotive, car-by-wire and fly-by-wire ones, require a higher reliability level of the electronic systems. Electrical (EOS/ESD) and electromagnetic (EMI) stresses are known to be at the origin of about 30 to 50% of the ICs failures both at the design phase and on the field. The efficiency of the integrated protections is decreasing with technology shrinking. In the future, Wireless Sensors Networks, Domestic  Robots, Smart Pills, and Lab-On-Chips may generate  new exciting markets for selected MEMS products, but one brake on the widespread use of these emerging applications is the related reliability issues. To cope with these reliability issues, both a global approach from the system level to the chip level and the co-design of the various protection strategies (EOS, ESD and EMI) will be required to provide efficient protection solutions.

The aim of this third edition of the EOS/ESD/EMI Workshop is to favor a cross-fertilization between experts and researchers in the fields of ESD, EMI and failure analysis. To increase these interactions, this workshop is now open to the European community and will be held over two days on May 18-19, 2006 in TOULOUSE at Institut Aéronautique et Spatial (IAS) site. On the morning of the first day, two tutorials of 1h30: one dedicated to ESD and one dedidated to EMI susceptibility will be given by experts of the field. Papers addressing the immunity issues of electronic applications to electrical (EOS/ESD) and electromagnetic (EMI) stresses, both at system level and chip level, are welcome. We encourage the submission of papers covering the various aspects: design of protections, testing, failure analysis, case studies, modeling for predictive reliability, etc...

We hope to see you in Toulouse, not only the “pink”city but also the city of the first successfull flight of the A380 AIRBUS plane.

Marise Bafleur, LAAS-CNRS, Technical Program Chair
Philippe Perdu, CNES, Technical Program Vice-Chair



      
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                Region Midi-Pyrenees    oryx logo   logo mb







Submission:

Deadline :
April 3rd, 2006


Abstract:
3 pages including figures.

Paper template to download: word, pdf

Send a PDF file by email
to
isabelle.nolhier@laas.fr


Topics :

Immunity issues of electronic applications to electrical (EOS/ESD) and   electromagnetic (EMI) stresses, both at system level and chip level

  • Design of protections
  • Testing
  • Failure analysis
  • Case studies
  • Modeling for predictive reliability




Registration:

The EOS/ESD/EMI Workshop will be entirely FREE  thanks to the sponsoring of CNES/CCT, LAAS-CNRS, Paul Sabatier University, Region Midi-Pyrenees, Aerospace Valley Competitiveness Cluster, MB Electronique, ORYX Instruments Corp.

      
Registration includes the proceedings of the tutorials and of the papers as well as lunches on May 18 and 19, dinner on May 18 and all coffee breaks.

However, to attend you need to registrate not later than May 5th, 2006.

Please send back by email or fax the registration form to the workshop secretariat : inolhier@laas.fr or fax:+33-561 336 208.



Accommodation:

We suggest that you plan your travel arrangements as soon as possible. Finding a hotel in Toulouse at this period of the year can sometimes be a difficult challenge.
You will find a list of some hotels downtown Toulouse at:

http://www2.laas.fr/laas/1-5528-Listes-des-hotels.php
 
A complete list of hotels in Toulouse can be found at: http://ott.totemstream.com/english/hebergements/index.lasso

In case of any difficulty, do not hesitate to contact the workshop secretariat.


More travel information




Conference Program    calendar                                                 Slides and Photos (Private Access)



Tutorials :

  • EMI immunity issues in integrated circuits: an overview of measurement methods and current studies - Mohamed Ramdani, ESEO (France)
This tutorial focuses on measurement and modeling methods of conducted and radiated immunity to RF in integrated circuits. These methods also take into account PCB and injection device models. An overview of BCI, DPI and near field scanning methods will be presented from technical and standardization points of view. The latest advances in immunity modeling, as well as simulation techniques, will be introduced with the help of actual case studies.

About the tutorial instructor:
After receiving his Ph.D Degree in Microelectronics from Université Paul Sabatier, Toulouse, France, in 1989, Mohamed Ramdani joined ESEO (Angers) as an Associate Professor in the fields of microelectronics and microwave electronics. His research interests are EMC of integrated circuits and integrated circuit design. He is a member of Union Technique de l'Electricité et de la communication (UTE - French section of the IEC). He takes part in the IEC 61967, 62132 (measurements and tests) and 62014 (EMC modeling and prediction) committees and vice-president of student activities of IEEE section France (Region 8). He participates to the European project PIDEA (EMC Pack).
  • ESD protection for advanced CMOS technologies - Harald Gossner, INFINEON (Germany)
Based on a short introduction of the ESD requirements and basic concepts, advanced techniques for silicon analysis, modelling and design verification of complex ESD protection in modern deep sub micron technologies are presented. The discussed applications cover high frequency circuits in the GHz range and system-on-chip design solutions including high voltage interfaces. An outlook is given for the scaling trend and the challenges and possible ESD protection approaches in non-planar CMOS (FINFET)

About the tutorial instructor:
Harald Gossner received his degree in physics (Dipl. Phys.) from the Ludwig-Maximilians-University, Munich in 1990  and his Ph. D. in electrical engineering  from the Universität der Bundeswehr,  Munich in 1995. Since 1995 he is with  Infineon Technologies working on the  development of ESD protection concepts  for bipolar, BiCMOS and CMOS  technologies. He is currently heading the  team of Infineon center of competence  for ESD and external latchup  development. He has authored and  coauthored more than 30 technical papers and one book in the field of ESD.


Invited speakers :

  • Electrostatic Discharge From Outside-to-Surface (ESDFOS) - Pete Jacob, EMPA (Switzerland)
  • EMI-induced failures in integrated circuits operation - Franco Fiori, University of Torino (Italy)
  • Review of Approaches and Solutions for Effective ESD Protection Devices and Schemes in Smart Power ICs - A. Andreini, ST Microelectronics (Italy)
  • Fly-by-wire : an opportunity - Etienne Foch, AIRBUS (France)



Equipment demonstration by Oryx and MB Electronique

  • Very Fast TLP with TDR signal processing (Wafer Level)




Access to IAS (PDF Map)

Contact : isabelle.nolhier@laas.fr

Fax : +33(0)5.61.33.62.08