PUBLICATIONS SCIENTIFIQUES
Revues internationales
[1]
J.Y Fourniols, M. Roca, F. Caignet, E. Sicard; "Characterization of Crosstalk noise in Submicron CMOS Intergarted circuits : An experimental view", pp271-280, IEEE Transactions on ElectroMagnetic Compatibility, August 1998, Vol 40, n°3
[2]
J.Y Fourniols, E. Sicard, C. Garres; "Une méthode de prédiction et de mesure de la diaphonie dans les circuits intégrés CMOS", Onde Electrique, Janvier 1995.
Conférences internationales avec comité de lecture
[5]
J.Y Fourniols, E. S,icard, C. Garres; "Measurement techniques for Coupling characterisation inside integrated Circuits", IEEE EMC Symposium, USA CHICAGO, August 1994.
[6]
A. Liaud, J.Y Fourniols, E. Sicard; "On crosstalk fault detection in Hierarchical VLSI circuits", IEEE Asian Test Symposium, JAPAN NARA, November 1994.
[7]
J.Y Fourniols, E. Sicard, C. Garres; "Built in Crosstalk Safety Margin testing", IEEE International on-line Testing Symposium, FRANCE NICE, pp139-143, July 1995.
[8]
J.Y Fourniols, N Fragnol, E. Sicard; "Conducted mode coupling Effects in Multi-Chip-Moduleinterconnections", 11th International Symposium on Electro Magnetic Compatibility, SWITZERLAND ZURICH, pp555-560, March 1995.
[9]
C. Garres, J.Y Fourniols, E. Sicard; "Built in Crosstalk Safety Margin testing", IEEE International on-line Testing Symposium, FRANCE NICE, pp139-143, July 1995.
[10]
C. Garres, J.Y Fourniols, E. Sicard, "An expert Analyst for EMC management at IC and module levels", 3rd ESA conférence , pp 35 -39, ITALY PISE, Nov 93.
[11]
C. Garres, J.Y Fourniols, E. Sicard, "Influence du packaging sur la CEM des circuits intégrés", Conférence CEM 94, FRANCE TOULOUSE,. Mars 94.
[12]
J.Y Fourniols, E. Sicard, JL Noullet, "A VLSI design project for crosstalk measurement", Eurochip Symposium, GERMANY DRESDEN, Sept 94.
[13]
E. Sicard, L Roy, JY Fourniols, "Characterisation of internal coupling within CMOS Integrated Circuits", PATMOS 93, FRANCE MONTPELLIER, Oct 93.
[14]
E. Sicard, JY Fourniols, "Crosstalk Sensors", Tempus Workshop Mixed design of VLSI circuits, POLAND DENBE, April 94.
[15]
E. Sicard, JY Fourniols, "Influence of temperature on crosstalk in ICs", Tempus Workshop Mixed design of VLSI circuits, POLAND DENBE, April 94.
Revues internationales
[16]
J.Y Fourniols, E. Sicard, C. Garres, L. Roy; "An approach to crosstalk measurement inside CMOS integrated circuits", Electronics letter, Dec 95.
[17]
J.Y Fourniols, E. Sicard, C. Garres; "Une méthode de prédiction et de mesure de la diaphonie dans les circuits intégrés CMOS", Onde Electrique, Janvier 1995.
[18]
J.Y Fourniols, E. Sicard, "Analytical crosstalk analysis in micro electronic systems", IEEE EMC Circuits, July 1996.
[19]
J.Y Fourniols, E. Sicard, "A VLSI advisor for EMC predictions inside CMOS Integrated Circuits", IEEE Computer Aided Design, Sept 1995.
Conférences internationales avec comité de lecture
[20]
J.Y Fourniols, E. Sicard, C. Garres; "Measurement techniques for Coupling characterisation inside integrated Circuits", IEEE EMC Symposium, USA CHICAGO, August 1994.
[21]
A. Liaud, J.Y Fourniols, E. Sicard; "On crosstalk fault detection in Hierarchical VLSI circuits", IEEE Asian Test Symposium, JAPAN NARA, November 1994.
[22]
J.Y Fourniols, E. Sicard, C. Garres; "Built in Crosstalk Safety Margin testing", IEEE International on-line Testing Symposium, FRANCE NICE, pp139-143, July 1995.
[23]
J.Y Fourniols, N Fragnol, E. Sicard; "Conducted mode coupling Effects in Multi-Chip-Moduleinterconnections", 11th International Symposium on Electro Magnetic Compatibility, SWITZERLAND ZURICH, pp555-560, March 1995.
[24]
C. Garres, J.Y Fourniols, E. Sicard; "Built in Crosstalk Safety Margin testing", IEEE International on-line Testing Symposium, FRANCE NICE, pp139-143, July 1995.
[25]
C. Garres, J.Y Fourniols, E. Sicard, "An expert Analyst for EMC management at IC and module levels", 3rd ESA conférence , pp 35 -39, ITALY PISE, Nov 93.
[26]
C. Garres, J.Y Fourniols, E. Sicard, "Influence du packaging sur la CEM des circuits intégrés", Conférence CEM 94, FRANCE TOULOUSE,. Mars 94.
[27]
J.Y Fourniols, E. Sicard, JL Noullet, "A VLSI design project for crosstalk measurement", Eurochip Symposium, GERMANY DRESDEN, Sept 94.
[28]
E. Sicard, L Roy, JY Fourniols, "Characterisation of internal coupling within CMOS Integrated Circuits", PATMOS 93, FRANCE MONTPELLIER, Oct 93.
[29]
E. Sicard, JY Fourniols, "Crosstalk Sensors", Tempus Workshop Mixed design of VLSI circuits, POLAND DENBE, April 94.
[30]
E. Sicard, JY Fourniols, "Influence of temperature on crosstalk in ICs", Tempus Workshop Mixed design of VLSI circuits, POLAND DENBE, April 94.
LAAS / CNRS
1997 –1998 :
Conférences avec comité de lecture :
[1] D.ESTEVE, J.J. SIMONNE, P. BERTHOMIEU, N. LESTRADE, " The new approach in design and technology imposed by microsystems dedicated to space ", 2nd round table on micro/nano technology for space, ESA-ESTEC Noordwijk-NL 15/10/97.
[2] D.ESTEVE, J.Y. FOURNIOLS, N. LESTRADE, J.J. SIMONNE, " Conception des systèmes : point de vue de la recherche ", MICAD 98, Paris 19/03/98.
Rapport technique :
[3] D.ESTEVE, J.Y. FOURNIOLS, N. LESTRADE, J.J. SIMONNE, " Etude et réalisation d’une maquette de micro-senseur d’attitude ", réf. 896/CNES/96/0691/00, Décembre 97.
Articles dans revues:
[4] J.Y. FOURNIOLS, E. SICARD, M. ROCA, " …. ", PP - , IEEE Transactions on Electro Magnetic Compatibility, A PARAITRE